Common Weakness Enumeration

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CWE-1319: Improper Protection against Electromagnetic Fault Injection (EM-FI)

Weakness ID: 1319
Abstraction: Base
Structure: Simple
Status: Incomplete
Presentation Filter:
+ Description
The device is susceptible to electromagnetic fault injection attacks, causing device internal information to be compromised or security mechanisms to be bypassed.
+ Extended Description

Electromagnetic fault injection may allow an attacker to locally and dynamically modify the signals (both internal and external) of an integrated circuit. EM-FI attacks consist of producing a local, transient magnetic field near the device, inducing current in the device wires. A typical EMFI setup is made up of a pulse injection circuit that generates a high current transient in an EMI coil, producing an abrupt magnetic pulse which couples to the target producing faults in the device, which can lead to:

  • Bypassing security mechanisms such as secure JTAG or Secure Boot
  • Leaking device information
  • Modifying program flow
  • Perturbing secure hardware modules (e.g. random number generators)
+ Relationships

The table(s) below shows the weaknesses and high level categories that are related to this weakness. These relationships are defined as ChildOf, ParentOf, MemberOf and give insight to similar items that may exist at higher and lower levels of abstraction. In addition, relationships such as PeerOf and CanAlsoBe are defined to show similar weaknesses that the user may want to explore.

+ Relevant to the view "Research Concepts" (CWE-1000)
ChildOfPillarPillar - a weakness that is the most abstract type of weakness and represents a theme for all class/base/variant weaknesses related to it. A Pillar is different from a Category as a Pillar is still technically a type of weakness that describes a mistake, while a Category represents a common characteristic used to group related things.693Protection Mechanism Failure
+ Relevant to the view "Hardware Design" (CWE-1194)
MemberOfCategoryCategory - a CWE entry that contains a set of other entries that share a common characteristic.1203Peripherals, On-chip Fabric, and Interface/IO Problems
+ Modes Of Introduction

The different Modes of Introduction provide information about how and when this weakness may be introduced. The Phase identifies a point in the life cycle at which introduction may occur, while the Note provides a typical scenario related to introduction during the given phase.

Architecture and Design
+ Applicable Platforms
The listings below show possible areas for which the given weakness could appear. These may be for specific named Languages, Operating Systems, Architectures, Paradigms, Technologies, or a class of such platforms. The platform is listed along with how frequently the given weakness appears for that instance.


Class: Language-Independent (Undetermined Prevalence)

Operating Systems

Class: OS-Independent (Undetermined Prevalence)


Class: Architecture-Independent (Undetermined Prevalence)


Class: System on Chip (Undetermined Prevalence)

Microcontroller IP (Undetermined Prevalence)

Memory IP (Undetermined Prevalence)

Power Management IP (Undetermined Prevalence)

Processor IP (Undetermined Prevalence)

Test/Debug IP (Undetermined Prevalence)

Sensor IP (Undetermined Prevalence)

+ Common Consequences

The table below specifies different individual consequences associated with the weakness. The Scope identifies the application security area that is violated, while the Impact describes the negative technical impact that arises if an adversary succeeds in exploiting this weakness. The Likelihood provides information about how likely the specific consequence is expected to be seen relative to the other consequences in the list. For example, there may be high likelihood that a weakness will be exploited to achieve a certain impact, but a low likelihood that it will be exploited to achieve a different impact.

Access Control

Technical Impact: Modify Memory; Read Memory; Gain Privileges or Assume Identity; Bypass Protection Mechanism; Execute Unauthorized Code or Commands

+ Demonstrative Examples

Example 1

In many devices, security related information is stored in fuses. These fuses are loaded into shadow registers at boot time. Disturbing this transfer phase with EM-FI can lead to the shadow registers storing erroneous values potentially resulting in reduced security.

Colin O'Flynn has demonstrated an attack scenario which uses electro-magnetic glitching during booting to bypass security and gain read access to flash, read and erase access to shadow memory area (where the private password is stored). Most devices in the MPC55xx and MPC56xx series that include the Boot Assist Module (BAM) (a serial or CAN bootloader mode) are susceptible to this attack. In this paper, a GM ECU was used as a real life target. While the success rate appears low (less than 2 percent), in practice a success can be found within 1-5 minutes once the EMFI tool is setup. In a practical scenario, the author showed that success can be achieved within 30-60 minutes from a cold start.

+ Potential Mitigations

Phases: Architecture and Design; Implementation

  • 1. Redundancy – By replicating critical operations and comparing the two outputs can help indicate whether a fault has been injected.
  • 2. Error detection and correction codes - Gay, Mael, et al. proposed a new scheme that not only detects faults injected by a malicious adversary but also automatically corrects single nibble/byte errors introduced by low-multiplicity faults.
  • 3. Fail by default coding - When checking conditions (switch or if) check all possible cases and fail by default because the default case in a switch (or the else part of a cascaded if-else-if construct) is used for dealing with the last possible (and valid) value without checking. This is prone to fault injection because this alternative is easily selected as a result of potential data manipulation [REF-1141].
  • 4. Random Behavior - adding random delays before critical operations, so that timing is not predictable.
  • 5. Program Flow Integrity Protection – The program flow can be secured by integrating run-time checking aiming at detecting control flow inconsistencies. One such example is tagging the source code to indicate the points not to be bypassed [REF-1147].
  • 6. Sensors – Usage of sensors can detect variations in voltage and current.
  • 7. Shields – physical barriers to protect the chips from malicious manipulation.
+ Notes


This entry is attack-oriented and may require significant modification in future versions, or even deprecation. It is not clear whether there is really a design "mistake" that enables such attacks, so this is not necessarily a weakness and may be more appropriate for CAPEC.
+ References
[REF-1141] Marc Witteman. "Secure Application Programming in the presence of Side Channel Attacks". 2017. <>.
[REF-1142] A. Dehbaoui, J. M. Dutertre, B. Robisson, P. Orsatelli, P. Maurine, A. Tria. "Injection of transient faults using electromagnetic pulses. Practical results on a cryptographic system". 2012. <>.
[REF-1143] A. Menu, S. Bhasin, J. M. Dutertre, J. B. Rigaud, J. Danger. "Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers". 2019. <>.
[REF-1144] Colin O'Flynn. "BAM BAM!! On Reliability of EMFI for in-situ Automotive ECU Attacks". <>.
[REF-1145] J. Balasch, D. Arumí, S. Manich. "Design and Validation of a Platform for Electromagnetic Fault Injection". <>.
[REF-1146] M. Gay, B. Karp, O. Keren, I. Polian. "Error control scheme for malicious and natural faults in cryptographic modules". 2019. <>.
[REF-1147] M. L. Akkar, L. Goubin, O. Ly. "Automatic Integration of Counter-Measures Against Fault Injection Attacks". <>.
+ Content History
+ Submissions
Submission DateSubmitterOrganization
2020-08-27Sebastien Leger, Rohini NarasipurBosch
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Page Last Updated: December 10, 2020