CWE-1419: Incorrect Initialization of Resource
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Edit Custom FilterThe product attempts to initialize a resource but does not correctly do so, which might leave the resource in an unexpected, incorrect, or insecure state when it is accessed.
This can have security implications when the associated resource is expected to have certain properties or values. Examples include a variable that determines whether a user has been authenticated or not, or a register or fuse value that determines the security state of the product. For software, this weakness can frequently occur when implicit initialization is used, meaning the resource is not explicitly set to a specific value. For example, in C, memory is not necessarily cleared when it is allocated on the stack, and many scripting languages use a default empty, null value, or zero value when a variable is not explicitly initialized. For hardware, this weakness frequently appears with reset values and fuses. After a product reset, hardware may initialize registers incorrectly. During different phases of a product lifecycle, fuses may be set to incorrect values. Even if fuses are set to correct values, the lines to the fuse could be broken or there might be hardware on the fuse line that alters the fuse value to be incorrect. This table specifies different individual consequences
associated with the weakness. The Scope identifies the application security area that is
violated, while the Impact describes the negative technical impact that arises if an
adversary succeeds in exploiting this weakness. The Likelihood provides information about
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consequences in the list. For example, there may be high likelihood that a weakness will be
exploited to achieve a certain impact, but a low likelihood that it will be exploited to
achieve a different impact.
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Relevant to the view "Research Concepts" (CWE-1000)
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Languages Class: Not Language-Specific (Undetermined Prevalence) Operating Systems Class: Not OS-Specific (Undetermined Prevalence) Architectures Class: Not Architecture-Specific (Undetermined Prevalence) Technologies Class: Not Technology-Specific (Undetermined Prevalence) Example 1 Consider example design module system verilog code shown below. The register_example module is an example parameterized module that defines two parameters, REGISTER_WIDTH and REGISTER_DEFAULT. Register_example module defines a Secure_mode setting, which when set makes the register content read-only and not modifiable by software writes. register_top module instantiates two registers, Insecure_Device_ID_1 and Insecure_Device_ID_2. Generally, registers containing device identifier values are required to be read only to prevent any possibility of software modifying these values. (bad code)
Example Language: Verilog
// Parameterized Register module example
// Secure_mode : REGISTER_DEFAULT[0] : When set to 1 register is read only and not writable// module register_example #( parameter REGISTER_WIDTH = 8, // Parameter defines width of register, default 8 bits parameter [REGISTER_WIDTH-1:0] REGISTER_DEFAULT = 2**REGISTER_WIDTH -2 // Default value of register computed from Width. Sets all bits to 1s except bit 0 (Secure _mode) ) ( input [REGISTER_WIDTH-1:0] Data_in, input Clk, input resetn, input write, output reg [REGISTER_WIDTH-1:0] Data_out ); reg Secure_mode; always @(posedge Clk or negedge resetn)
if (~resetn)
endmodule begin
Data_out <= REGISTER_DEFAULT; // Register content set to Default at reset
end Secure_mode <= REGISTER_DEFAULT[0]; // Register Secure_mode set at reset else if (write & ~Secure_mode) begin
Data_out <= Data_in;
end module register_top ( input Clk, input resetn, input write, input [31:0] Data_in, output reg [31:0] Secure_reg, output reg [31:0] Insecure_reg ); register_example #(
.REGISTER_WIDTH (32),
) Insecure_Device_ID_1 ( .REGISTER_DEFAULT (1224) // Incorrect Default value used bit 0 is 0.
.Data_in (Data_in),
); .Data_out (Secure_reg), .Clk (Clk), .resetn (resetn), .write (write) register_example #(
.REGISTER_WIDTH (32) // Default not defined 2^32-2 value will be used as default.
) Insecure_Device_ID_2 (
.Data_in (Data_in),
); .Data_out (Insecure_reg), .Clk (Clk), .resetn (resetn), .write (write) endmodule These example instantiations show how, in a hardware design, it would be possible to instantiate the register module with insecure defaults and parameters. In the example design, both registers will be software writable since Secure_mode is defined as zero. (good code)
Example Language: Verilog
register_example #(
.REGISTER_WIDTH (32),
) Secure_Device_ID_example ( .REGISTER_DEFAULT (1225) // Correct default value set, to enable Secure_mode
.Data_in (Data_in),
);
.Data_out (Secure_reg), .Clk (Clk), .resetn (resetn), .write (write) Example 2 This code attempts to login a user using credentials from a POST request: (bad code)
Example Language: PHP
// $user and $pass automatically set from POST request if (login_user($user,$pass)) { $authorized = true; }... if ($authorized) { generatePage(); }Because the $authorized variable is never initialized, PHP will automatically set $authorized to any value included in the POST request if register_globals is enabled. An attacker can send a POST request with an unexpected third value 'authorized' set to 'true' and gain authorized status without supplying valid credentials. Here is a fixed version: (good code)
Example Language: PHP
$user = $_POST['user'];
$pass = $_POST['pass']; $authorized = false; if (login_user($user,$pass)) { $authorized = true; }... This code avoids the issue by initializing the $authorized variable to false and explicitly retrieving the login credentials from the $_POST variable. Regardless, register_globals should never be enabled and is disabled by default in current versions of PHP. Example 3 The following example code is excerpted from the Access Control module, acct_wrapper, in the Hack@DAC'21 buggy OpenPiton System-on-Chip (SoC). Within this module, a set of memory-mapped I/O registers, referred to as acct_mem, each 32-bit wide, is utilized to store access control permissions for peripherals [REF-1437]. Access control registers are typically used to define and enforce permissions and access rights for various system resources. However, in the buggy SoC, these registers are all enabled at reset, i.e., essentially granting unrestricted access to all system resources [REF-1438]. This will introduce security vulnerabilities and risks to the system, such as privilege escalation or exposing sensitive information to unauthorized users or processes. (bad code)
Example Language: Verilog
module acct_wrapper #(
...
always @(posedge clk_i)
begin
if(~(rst_ni && ~rst_6))
...
begin
for (j=0; j < AcCt_MEM_SIZE; j=j+1)
end
begin
acct_mem[j] <= 32'hffffffff;
endTo fix this issue, the access control registers must be properly initialized during the reset phase of the SoC. Correct initialization values should be established to maintain the system's integrity, security, predictable behavior, and allow proper control of peripherals. The specifics of what values should be set depend on the SoC's design and the requirements of the system. To address the problem depicted in the bad code example [REF-1438], the default value for "acct_mem" should be set to 32'h00000000 (see good code example [REF-1439]). This ensures that during startup or after any reset, access to protected data is restricted until the system setup is complete and security procedures properly configure the access control settings. (good code)
Example Language: Verilog
module acct_wrapper #(
...
always @(posedge clk_i)
begin
if(~(rst_ni && ~rst_6))
...
begin
for (j=0; j < AcCt_MEM_SIZE; j=j+1)
end
begin
acct_mem[j] <= 32'h00000000;
end
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